Title
Norman patent notebook (#195)Catalog Number
102723002Type
DocumentDescription
Contains evaluations and proposed responses to customer requests for custom IC designs. Examples: an NPNP solid state memory element (Remington Rand), Digital Integrator (RAE, England), Satellite Data Receiver (NASA). Norman discloses proposals for a differential amplifier (p. 23) and Redundancy Memory (p. 29).Date
1962-01-18-1962-03-15Author
Norman, Robert H.Biographical Notes
Robert (Bob) H. Norman graduated from Oklahoma A&M University in 1954 with a B.S. in electronic engineering and math. In his undergraduate year he worked for the Sperry Gyroscope Advanced Weapon Systems Department on the application of transistors to computer design where he first conceived the idea of using transistors for memory storage. He joined Sperry full time in 1957. Fairchild co-founder Vic Grinich hired Norman to head up the device evaluation section in 1959 where he proposed and designed the DCTL circuit configuration for Micrologic the first planar IC family. He also developed and earned a patent on an early IC memory invention. Norman co-founded two pioneering MOS companies, General Microelectronics in 1963 and Nortec Electronics in 1968 and served as VP Engineering at American Microsystems Inc (AMI), Cupertino, California.Publisher
Fairchild SemiconductorIdentifying Numbers
Document number | 195 |
Extent
Approximately 24 dated entries over 45 pages.Dimensions
12 x 10 inchesPatents
The author is named as inventor on 8 U.S patents, including 1 patent assigned to Fairchild:U.S. patent 3562721, "Solid state switching and memory apparatus." Filed 1963-03-05. Issued 1971-02-09.
Note: schematic diagrams of a memory cell and peripheral circuits similar to those in this patent are inserted into the Bonfadini (Lab) notebook.
Category
NotebooksCollection Title
Fairchild Semiconductor notebooks and technical papersPublications
The author contributed to the following conference papers during his service at Fairchild:Norman, R., Last, J. and Haas, I. Solid-state micrologic elements. 1960 IEEE International Solid-State Circuits Conference: Digest of Technical Papers, vol. III
(1960): 82-83 (Reprinted as Fairchild TP-7).
Norman, R. Status report on micrologic elements. 51st Bumblebee Guidance Conference (1960-06) (Reprinted as Fairchild TP-10).
Norman, R. and Anderson, R. Testing of micrologic elements. Western Joint Computer Conference (1961-05) (Reprinted as Fairchild TP-18).