Artifact Details

Title

Scalable multiprocessors and the DASH approach

Catalog Number

102624687

Type

Moving Image

Date

1992-04

Credits

Hennessy, John L.

Publisher

University Video Communications

Duration

00:52:00

Format

Betacam SP

Copyright Holder

Computer History Museum

Description

From University Video Communications' catalog:

"Any multiprocessor architecture that claims to scale to large numbers of processors must be able to scale both the private memory bandwidth and the interprocessor communication bandwidth. It is easy to see how nonshared memory machines can provide for scaling these metrics; however, it is less easy to see how a shared memory machine can do so. The DASH architecture being developed at Stanford provides for the scaling of both local and shared memory bandwidth. DASH uses distributed memory and a cache coherency protocol based on directories. The shared memory model simplifies programming and eases the construction of efficient compilers."

Category

Lecture

Credit

Gift of University Video Communications

Lot Number

X6636.2013