TitleInstruction-level parallelism (ILP)
CreditsFisher, Joseph A.
PublisherUniversity Video Communications
Copyright HolderComputer History Museum
DescriptionFrom University Video Communications' catalog:
"Nearly all high-performance microprocessor designs now embody some form of instruction-level parallelism. Whether through super-scalar or VLIW parallelism, processors go faster by overlapping the execution of several different functional units without requiring the programmer to rearrange or rethink programs. In this talk, Fisher surveys the history, present status, and research problems of ILP. Topics include hardware techniques such as speculative execution, software techniques such as trace scheduling and software pipe-lining, and system issues such as object code compatibility and recompilation."