TitlePowerPC 601 microprocessor
CreditsDiefendorff, Keith (speaker)
PublisherUniversity Video Communications
Copyright HolderComputer History Museum
DescriptionFrom University Video Communications' catalog:
"The PowerPC RISC architecture is derived from the IBM POWER (RS/6000) architecture, which was simplified and enhanced to support aggressive superscalar implementations. The PowerPC 601 is the first of a family of PowerPC microprocessors being jointly developed by IBM and Motorola. This tape describes the characteristics and internal organization of the 601, which can dispatch three instructions per clock out-of-order, has a large 32KB on-chip cache, and a sophisti-cated memory interface unit. The 2.8 million transistor, 0.6 micron CMOS chip provides performance of over 60 SPECint92 and 80 SPECflt92 in a die less than 11mm on a side."