TitleThe superscalar hardware architecture of the MC 6860
CreditsCircello, Joseph (speaker)
PublisherUniversity Video Communications
Copyright HolderComputer History Museum
DescriptionFrom University Video Communications' catalog:
"Joseph Circello describes the innovative features of the superscalar micro-architecture of the Motorola MC68060 processor. Superscalar processors exploit instruction-level parallelism inherent in most programs by implementing a micro-architecture which dispatches and executes multiple instructions in a single cycle. This presentation discusses how the MC68060 addresses such obstacles at variable length instructions, multiple instruction formats, etc., with a series of architectural features to bring dramatic new performance levels to the MC68060 family."