TitleAngell patent notebook (#616)
Biographical NotesJames Browne Angell was born on Staten Island, New York., in 1924. He received a B.S. in 1946, M.S. also in 1946 and Ph.D. in 1952 in electrical engineering from the Massachusetts Institute of Technology and from 1946 to 1951 he studied noise in tracking radars at MIT's Research Laboratory of Electronics. He worked for Philco on circuit applications and evaluation of transistors and other solid-state devices for 9 years where he met Fairchild and Intel co-founder Robert Noyce. He joined Stanford's Department of Electrical Engineering in 1960 and became a full professor in 1962. From 1963 through 1973 he consulted with the Fairchild Semiconductor R&D department in Palo Alto. He directed the Stanford Solid-State Industrial Affiliates program from 1964 to 1970. He retired in 1991 and died in 2006. Angell recommended Ted Hoff to Intel, where he became employee number 12. Hoff designed the architecture for Intel’s first microprocessor. Angell appeared with Harry Sello in Fairchild’s 1967 Briefing on Integrated Circuits video infomercial on PBS.
ExtentApproximately 109 dated entries over 151 pages.
Dimensions12 x 10 inches
DescriptionThis volume contains a continuation of semiconductor MOS memory yield enhancement projects from the Angell (p. 287) volume and design considerations for automatic mask alignment equipment. Significant entries include: high lead count (50 leads) packaging for multichip memory arrays (p. 10); discretionary wiring structure for memory array yield improvement (p. 17); MOS flip-flop with MOS resistors (p. 25); precision positioning of step and repeat mask equipment using photodiodes and electronic automatic mask alignment (p. 81).
PatentsThe author is named as inventor on 2 patents assigned to Fairchild:
U.S. patent 3325787, “Trainable system.” Filed 1964-10-19. Issued 1967-06-13.
U.S. patent 3530443, “MOS gated resistor memory cell.” Filed 1968-11-27. Issued 1970-09-22.
Collection TitleFairchild Semiconductor notebooks and technical papers
PublicationsThe author contributed to the following R&D Technical Reports (TR) and papers in professional publications during his service at Fairchild:
TR 245 Improving yield of integrated arrays via redundancy (1966-03-30).
Angell, J. B., The need and means for self-repairing circuits. Proceedings of the IEEE, vol. 51 , iss. 3 (1963): 536.
Linvill, J. G., Angell, J. B. and Pritchard, R. L., Integrated electronics vs electrical engineering education . Proceedings of the IEEE, vol. 52, iss. 12 (1964): 1425-1429.
Pritchard, R. L., Angell, J. B., Adler, R. B., Early, J. M. and Webster, W. M., Transistor Internal Parameters for Small-Signal Representation. Proceedings of the IRE, vol. 49, iss. 4 (1961): 725-738.
Tammaru, E. and Angell, J. B., Redundancy for LSI Yield Enhancement. IEEE Journal of Solid-State Circuits, vol. 2, iss. 4 (1967): 172-182.
Thornton, C. G. and Angell, J. B., Technology of Micro-Alloy Diffused Transistors. Proceedings of the IRE, vol. 46, iss. 6 (1958): 1166-1176.
Widrow, B., Pierce, W. H. and Angell, J. B., Birth, Life, and Death in Microelectronic Systems . IRE Transactions on Military Electronics, vol. MIL-5, iss. 3 (1961): 191-201.
Williams, M. J. Y. and Angell, J. B., Enhancing Testability of Large-Scale Integrated Circuits via Test Points and Additional Logic. IEEE Transactions on Computers, vol. C-22, iss. 1 (1973): 46-60.