TitleManoliu patent notebook (#2834)
Biographical NotesJulianna Manoliu joined Fairchild circa 1969 where she worked on polycrystalline silicon process technology research under the supervision of R. Tucker. She left to join Hewlett Packard Research Labs circa 1978. She returned to Fairchild circa 1982 and possibly remained with the company until it was acquired by National Semiconductor where she was named as inventor on several patents circa 1990.
Dimensions12 x 10 inches
DescriptionThis book is blank.
PatentsThe author is named as inventor on 5 U.S patents. 2 patents are assigned to Fairchild:
U.S. patent 4087571, “Controlled temperature polycrystalline silicon nucleation.” Filed 1975-06-24. Issued 1975-06-24.
U.S. patent 4727046, “Method of fabricating high performance BiCMOS structures.” Filed 1986-07-16. Issued 1988-02-23.
Collection TitleFairchild Semiconductor notebooks and technical papers
PublicationsThe author contributed to the following R&D Technical Reports (TR) and papers in professional publications during her service at Fairchild:
TR454 The use of polycrystalline silicon in the fabrication of low breakdown voltage diodes (1970-01-30).
TR478 Diffusion into polycrystalline silicon: diffusion from borovapox (1970-07-09).
TR491 Deposition and properties of polycrystalline silicon for silicon-gate Technology (1970-10-16).
TR537 P-N junctions in po1ycrystalline silicon films (1972-01-20).
Kamins, T. I., Manoliu, J. and Tucker, R. N. Diffusion of impurities in polycrystalline silicon. Journal of Applied Physics, vol. 43, iss. 1 (1972): 83-91.
*Manoliu , J. P-N junctions in polycrystalline silicon films. Solid-State Electronics, vol. 15, iss. 10 (1972-10): 1103-1106
Manoliu, J. A submicron dual buried layer twin well CMOS SEG process. 1987 International Electron Devices Meeting, vol. 33, (1987): 20-23.
*Paper included in the set of three bound volumes of “Fairchild Research Published Technical Papers” assembled by Bruce Deal in 1988.