TitleSmith patent notebook (#714)
AuthorSmith, William R.
Biographical NotesWilliam R. Smith (Ph.D.) joined Fairchild circa mid-1963 from the Electrical Engineering Department, Engineering Experiment Station at Iowa State University in Ames, Iowa, where he performed research into tunnel diode logic circuits. A 1966 R&D Lab organization chart identifies him as a member of Technical Staff in the Digital Systems Research Dept reporting to Rex Rice where he was a principal contributor to the architecture for the SYMBOL IIR high-level time-sharing computer system. SYMBOL eliminated extensive machine instructions with hundreds of commands and replaced them with a simpler set of instructions composed in English. This made programming the Symbol IIR fast, simple and efficient. One system was shipped to the Department of Electrical and Computer Engineering at Iowa State University in 1970.
ExtentSee Abstract. 79 pages used.
Dimensions12 x 10 inches
DescriptionThis volume (pp.1–76) continues the 100-plus page document titled “General System Configuration” comprising block diagrams and functional descriptions of the machine included in Smith (470). Note the dates on the pages record when they were pasted into the book (1967-04-25) not the date of the invention. These were in mostly in 1966-10 and 1966-11. Also disclosure of “Paging Algorithm” (pp. 77-79).
PatentsThe author is named as inventor on 4 U.S patents, including 4 patents assigned to Fairchild:
U.S. patent 3577130, “Means for limiting field length of computed data.” Filed 1969-10-03. Issued 1971-05-04.
U.S. patent 3643225, “Memory control system.” Filed 1969-04-02. Issued 1972-02-01.
U.S. patent 3643227, “Job flow and multiprocessor operation control system.” Filed 1969-09-15. Issued 1972-02-05.
U.S. patent 3647348, “Hardware-oriented paging control system.” Filed 1970-01-19. 1972-03-07.
Collection TitleFairchild Semiconductor notebooks and technical papers
PublicationsThe author contributed to the following R&D Technical Reports (TR) and papers in professional publications during his service at Fairchild:
TR146 Logic function usage in a large data processor (1963-12-13).
Seeds, R.B., Smith, W.R. and Nevala, R.D. Integrated complementary transistor nanosecond logic. Proceedings of the IEEE, vol. 52, iss. 11 (1964): 1584-1590.
Smith, W. R. and Pohm, A. V. A new approach to resistor-transistor-tunnel-diode nanosecond logic. IRE Transactions on Electronic Computers, vol. EC-11, iss. 5 (1962): 658-664.