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Details

Catalog Number

102723919

Title

Kattner patent notebook (#107)

Type

Text

Date

1960-03-30-1961-01-25

Author

Kattner, Lionel E.

Biographical Notes

Lionel Estes Kattner (1930 – 2011) received a degree in chemistry, physics and math from Southwestern University, located in Georgetown, Texas in 1951. After graduation he worked at the Hanford, Washington plant on the production of plutonium for nuclear weapons and later served as a nuclear officer in the United States Navy. In 1958 he joined Texas Instruments in Dallas as a product engineer on a germanium mesa transistor product line. In 1959 Kattner was recruited into Jay Last’s microelectronics group at Fairchild Semiconductor where he worked closely with I. Haas on the fabrication of Micrologic, the first planar integrated circuit family. With three other Fairchild employees, he co-founded Signetics Corporation in 1961. He resigned from Signetics in 1967 and spent two years at Amelco Semiconductor. From 1969 until his retirement Kattner was involved with various projects and startups, including real estate development, computers, computerized mapping, microwave communications and fiber optics.

Publisher

Fairchild Semiconductor

Identifying Numbers

Document number 107

Extent

5 dated entries over 16 pages.

Dimensions

12 x 10 inches

Description

Describes several approaches to achieving physical electrical isolation between active devices on a silicon wafer, including the complete process flow used in the successful fabrication of the first working planar IC in 1960-05 (p. 3).

This is one of 4 books authored by Kattner. The other three books are designated Lab1, Lab2, and Lab3.

Patents

The author is named as inventor on 1 U.S. patent. This patent is not assigned to Fairchild.

Category

Notebooks

Collection Title

Fairchild Semiconductor notebooks and technical papers

Credit

Gift of Texas Instruments Incorporated

Lot Number

X6464.2012