Artifact Details

Title

Wanlass patent notebook (#239)

Catalog Number

102723924

Type

Text

Date

1962-10-05-1963-07-30

Author

Wanlass, Frank M.

Biographical Notes

Frank Marion Wanlass was born in Thatcher Arizona in 1933. He graduated with a PhD in solid-state physics from the University of Utah of in 1962 and joined the Fairchild Semiconductor R&D Laboratory in Palo Alto, California in October of that year. In 1963 he filed the first patent on a Complementary MOS structure that enables modern battery-powered products and noted, but did not pursue, the movement of charge through oxide onto a gate that is the basis of the EPROM device. He joined General Micro-electronics in 1964 where he helped establish the company as an early entrant in the MOS market before moving to General Instrument in 1965 where he developed MNOS EEPROM technology. Wanlass left GI in 1970 to found Nitron and subsequently joined Zytrex in 1983. He died in September 2010. He is named as inventor on 27 U.S. Patents.

Publisher

Fairchild Semiconductor

Identifying Numbers

Document number 239

Extent

29 dated entries over 21 pages.

Dimensions

12 x 10 inches

Description

Describes ideas for new MOS device and circuit elements and laboratory test results of experimental process variations on P and N-channel MOS devices (He uses the early acronym MOST throughout). An entry “Micropower Switching Element” (p. 3) was the basis for his U.S. patent #3356858 describing the Complementary MOS circuit. CMOS consumes very low power and is the most widely used integrated circuit for battery powered portable equipment today. An entry dated 1963-01-02 (p. 12) describes “interesting phenomena” regarding unexplained “charge penetration of the oxide” that appears to be an early observation of the tunneling effect later exploited in EPROM memory devices. Several entries (p. 8 and p. 17) describe early ideas for MOS memory cells intended for use as storage cells in semiconductor memory devices The A. C. Amplifier entry (p. 21) describes work that led to patent 3289093 (below). A handwritten draft of the internal Product Manual for the FI-1 P-Channel MOS Transistor is inserted at the front of the book. 16 legal size pages of other notes and circuit diagrams are included.

Patents

The author is named as inventor on 27 U.S. patents, including 2 patents assigned to Fairchild:

U.S. patent 3356858, “Low stand-by power complementary field effect circuitry.” Filed 1963-06-18. Issued 1967-12-05.

U.S. patent 3289093, “A.C. amplifier using enhancement-mode field effect devices.” Filed 1964-02-20. Issued 1967-12-05.

Category

Notebooks

Collection Title

Fairchild Semiconductor notebooks and technical papers

Publications

In addition to numerous application notes and magazine articles published throughout his career, the author contributed to the following R&D Technical Reports (TR) and conference papers during his service at Fairchild:

TR86 FET Linear circuits (1962-10-04).

TR98 Nanowatt logic using field effect metal-oxide semiconductor-triodes (MOSTs) (1963-01-23).

Wanlass, F. and Sah, C., Nanowatt logic using field-effect metal-oxide semiconductor triodes.1963 IEEE International Solid-State Circuits Conference: Digest of Technical Papers, vol. VI (1963): 32 - 33.

Credit

Gift of Texas Instruments Incorporated

Lot Number

X6464.2012