TitleWilson patent notebook (#541)
AuthorWilson, Garth H.
Biographical NotesGarth H. Wilson received a B.S.E.E. in 1956, M.S.E.E. in 1958 and Ph.D. in 1962 from the University of California, Berkeley. He joined the Fairchild Semiconductor R&D Laboratory, located in Palo Alto in 1966. A 1968 R& D organization chart shows him as Member of Technical Staff in the Linear Integrated Circuits section reporting to M. Rudin. As Linear IC Design Manager he worked with Ted Jenkins to build a Schottky diode structure compatible with integrated circuit processing technology. In 1969 he co-founded Precision Monolithics with Marv Rudin. He served as Managing Director of the Non-Volatile Memory group at AMD in the late 1970s. He also served in senior technical management roles at Intel and Digital Equipment Corporation before retiring in 1995.
ExtentApproximately 23 dated entries over 39 pages.
Dimensions12 x 10 inches
DescriptionThis volume contains process and circuit design ideas for analog (linear) ICs and Schottky barrier diode technology. Specific entries include; current limited class-AB output amplifier (pp. 1-7); list of new ideas (p. 8); multiple loop feedback (pp. 10-12); compatible NPN-PNP process (pp. 13-15); pair matching in ICs (pp. 22-23); results of test on his Schottky Barrier Diode (SBD) idea and five proposed IC applications (pp. 30-37).
PatentsThe author is named as inventor on 1 U.S. patent. This patent is assigned to Fairchild:
U.S. patent 3623925, "Schottky-Barrier diode process and devices." Filed 1969-01-10. Issued 1971-11-30.
Collection TitleFairchild Semiconductor notebooks and technical papers
PublicationsThe author contributed to the following R&D Technical Reports (TR) and papers in professional publications during his service at Fairchild:
TR414 Technology for the design of low power circuits (1969-06-23).
Bittmann, C. A., Wilson, G. H., Whittier, R. J. and Waits, R. K., Technology for the design of low-power circuits. IEEE Journal of Solid-State Circuits, vol. 5, iss. 1 (1970): 29 – 37.