Floating Point, Past, Present and Future
This is the second video in a series on floating point arithmetic, featuring presentations by David Bailey (NASA Ames Research Center), Joel Boney (Hal Computer), Jerome Coonen (Apple Computer), Harsh Sharangani (Intel), William Kahan (UC Berkeley), and Brian Wong (Sun Microsystems). Boney begins by presenting his work at Motorola, including his work on the 68000-series floating point chips, and the specifics of the individual chips and difficulties that would face future chip architects. David Bailey then follows by speaking on high-performance applications to floating point processing, as well as looking at the trends in high-performance computers, the potential of home-use of processors to access video information. Sharangani outlines Intel’s involvement in floating point processors, and the coming challenges in consumer chip design. David Hough discusses some of the issues within the IEEE 754 standard for floating point arithmetic. Jerome Coonen looks back at his work on floating point concepts for consumer-end machines at Apple. Brian Wong discusses his experiences working with customers using floating point systems at Sun Microsystems. William Kahan discusses floating point philosophy, use, and promotion within education. The presentations are then followed by twenty minutes of questions from the audience answered by the panel.
Place of Publication
Bay Area Computer History Perspectives