Hoerni patent notebook (#3)
This volume contains a mix of brief notes on the status of experimental wafers together with extended disclosures of process and design ideas that were used as the basis for patent filings. Specific entries include: "Method of protecting exposed p-n junctions at the surface of silicon transistors by oxide masking techniques" (pp. 3-4) this was his first expression of the planar process – U.S. patent 3025589; "Effect of gold-doping on lifetimes in transistors" (pp. 7-11) – U.S. patent 3108914; “Use of selective control on electron and hole lifetimes in semiconductor devices” (pp. 12-15) – U.S. patent 3184347; “PNP planar transistors” (pp. 17-18); “On the application of the Merck growing technique to device structures;” “Observations on the impact and applications of epitaxial films” (pp. 23-24); “Logic using unipolar transistors” proposes a practical method of implementing the ideas of Walmark at RCA (pp. 26–28).
Item Details
- Date
- 1957-11-07-1960-12-22 (Made)
- Type
- Document
- Catalogue number
- 102722910
- Other identifying number
- 3 (Document Number)
- Organization
- Fairchild Semiconductor Corporation (Publisher)
- People
- Jean A. Hoerni (Author)
- Category
- Notebooks
- Credit line
- Gift of Texas Instruments Incorporated
- Extent
- Approximately 22 dated entries over 30 pages.
- Language
- English
- Dimension
- 10w x 12h x 16l (in)
25.4w x 30.48h (cm) - Acquisition number
- X6464.2012
- Archive collection
- Fairchild Semiconductor notebooks and technical papers
- Archive hierarchy
- Fairchild Semiconductor notebooks and technical papers