Title
Brown patent notebook (#1413)Catalog Number
102722938Type
DocumentDescription
Describes design techniques for very high-speed circuits for the Fairchild 10K and 95K ECL families. Includes proposals for input level translators, deglitching resistor arrays and priority encoders. Proposals for minimum-area bipolar memory cells include layout schematics and plots.Date
1973-02-19-1975-05-30Author
Brown, George W.Biographical Notes
George W. Brown joined Fairchild circa 1973 where he worked as a circuit design engineer on high speed ECL devices together with (or for) Harold Muller and Jim Hively. From 1975 to 1985 he was managing director of the Bipolar RAM business unit at Advanced Micro Devices. He was a co-founder and Vice President, Business Development at Synergy Semiconductor Corp. from 1986 until the company was acquired by Micrel in 1998. At Micrel he served as Director of Marketing.Publisher
Fairchild SemiconductorIdentifying Numbers
| Document number | 1413 |
Extent
8 dated entries over 31 pages.Dimensions
12 x 10 inchesPatents
The author is named as inventor on 5 U.S patents, including one patent assigned to Fairchild:U.S. patent 4035784, “Asymmetrical memory cell arrangement.” Filed 1975-12-22. Issued 1977-07-12.