Artifact Details


Dumesnil patent notebook (#370)

Catalog Number







Dumesnil, Maurice E.

Biographical Notes

Maurice E. Dumesnil worked for DuPont, located in Wilmington, Delaware, in 1960. He joined Fairchild circa 1961 where he performed research on deposition of oxide on silicon and on glass materials used in the sealing of semiconductor device packages. In 1966 he was a Member Technical Staff in the Materials and Processes Department reporting to H. Sello and in 1968 he was in the Dielectric Films section reporting to B. Deal. He joined Technology Glass Corporation, Sunnyvale, California, in the 1970s and in the late 1980s was with VLSI Packaging Materials, Inc. Sunnyvale, California.


Fairchild Semiconductor

Identifying Numbers

Document number 370


Approximately 80 dated entries over 152 pages.


12 x 10 inches


This volume describes processes and procedures followed in the exploration of deposited materials, especially glass types for sealing ceramic packages. Specific entries include; thick silicon monoxide surface sealed devices (pp. 2-3); review of diode surface protection program for San Rafael (pp. 5-18); new package for ICs (p. 19); development of low melting glasses (pp. 23-31 and 53-61); adherence of gold on Si – found to be poor (P. 33); phosphate glass for MOS devices (pp. 91-99); and construction of multilayered ceramic substrate (pp. 100-103).


The author is named as inventor on at least 13 U.S patents, including 3 patents assigned to Fairchild:

U.S. patent 3432405, “Selective masking method of silicon during anodization.” Filed 1966-05-16. Issued 1969-03-11.

U.S. patent 3408212, “Low melting oxide glass.” Filed 1965-06-04. Issued 1968-10-29.

U.S. patent 3650778, “Low-expansion, low-melting zinc phosphovanadate glass compositions.” Filed 1969-10-29. Issued 1972-03-21.



Collection Title

Fairchild Semiconductor notebooks and technical papers


The author contributed to the following R&D Technical Reports (TR) and papers in professional publications during his service at Fairchild:

TR65 Semiconductor glasses [1962-02-09].

TR71 Considerations on a high voltage planar thermoelectric converter [1962-04-27].

TR94 Microelectronic component interconnections and packaging - part I [1962-12-28].

TR124 Chromium-silicon contacts [1963-06-26].

TR167 Microelectronic component interconnections and packaging - part II [1964-04-03].

TR179 Aluminum-silicon resistance as a function of silicon resistivity, alloying cycle and contact geometry, case 1: p-silicon (boron doped) [1964-05-28].

TR225 Space charge polarization in glass films [1965-07-20].

TR276 Fused glass films on silicon devices [1967-01-0-15].

TR313 The Vitrox process: Fairchild #10 and #74 glass synthesis, comminution and fusion on silicon devices [1967-10-10].

Dumesnil, M. and Schroeder, J., A large-scale integration hybrid substrate. 1969 IEEE International Solid-State Circuits Conference: Digest of Technical Papers, vol. XII, (1969): 66-67.

Snow, E. H. and Dumesnil, M. E., Space-charge polarization in glass films, Journal of Applied Physics, vol. 37, iss. 5 (1966): 2123-2131.


Gift of Texas Instruments Incorporated

Lot Number