TitlePerkins patent notebook (#216)
DescriptionDescribes experimental work and results on the basic criteria for thin film memory systems together with memory spot and conductor layout drawings. Includes circuits for microelectronic flip-flop memory improvements (1952-10-18); test of magnetic films and circuits; evaluation of “Memorix” wire memory manufactured by Tokyo Radio Coil; improvements to coincident addressing of semiconductor memory elements; and core memory addressing techniques.
AuthorPerkins, Harley A.
Biographical NotesHarley A. Perkins worked on magnetic amplifiers for Westinghouse in Pennsylvania before joining Fairchild in 1962 as head of a new High-Speed Memory Engineering Section to investigate ways in which Fairchild capabilities could be employed in computer information storage and retrieval. He managed an engineering group that was spun out as the Fairchild Memory Products division with five technical personnel in 1965, including engineers Jack Schmidt and Frank Greene, to explore business opportunities for the company in ferrite core, thin film, and semiconductor memory systems. The unit was closed in 1967. In 1968 he was at Oregon State University in Corvallis, Oregon, and later at Tektronix, Inc. in Beaverton, Oregon. In the 1990s he filed patents assigned to Northrop Corporation from an address in Brookline, Massachusetts.
ExtentApproximately 37 dated entries over 98 pages.
Dimensions12 x 10 inches
PatentsThe author is named as inventor on 12 U.S patents, including 2 patents assigned to Fairchild:
U.S. patent 3331058, “Error free memory.” Filed 1964-12-24. Issued 1967-07-11.
U.S. patent 3325787, “Trainable system”. Filed 1964-10-19. Issued 1967-06-13.
Collection TitleFairchild Semiconductor notebooks and technical papers
PublicationsThe author contributed to the following conference papers during his service at Fairchild:
Perkins, H. Magnetic switching in materials. IEEE Transactions on Parts, Materials and Packaging, vol. 4, iss. 4 (1968): 102-109.
Perkins, H. A. and Schmidt, J. D. An integrated semiconductor memory system.
Fall Joint Computer Conference: AFIPS Proceedings, vol. 27 (1965-11): 1053-1064.