TitleJenkins patent notebook (#597)
AuthorJenkins, Robert T.
Biographical NotesRobert T. (Ted) Jenkins received a B.S. (1965) and an M.S. (1966) from the California Institute of Technology, Pasadena, California. In 1966 he joined the Fairchild Semiconductor R&D Laboratory in Palo Alto where he was an Engineer B in the Device Development Dept headed by W. Steffe. In early 1968 he was working on Schottky Barrier device idea proposed by G. Wilson in the Linear IC Department under M. Rudin. He joined Intel in late 1968 where he worked in wafer fabrication, including creating the process for the first commercial Intel product, a Schottky bipolar 64-bit memory. He held a variety of assignments in manufacturing and general management and retired as vice president and director of corporate licensing in 1999.
Extent6 dated entries over 8 pages.
Dimensions12 x 10 inches
DescriptionThis volume describes 6 disclosures related to processing and device design, including a Schottky Barrier structure, the topic of U.S. patent 3623925 below (p. 4).
PatentsThe author is named as inventor on 2 U.S. patents, including 1 patent assigned to Fairchild:
U.S. patent 3623925, “Schottky-Barrier diode process and devices” Filed 1969-01-10. Issued 1971-11-30.
Collection TitleFairchild Semiconductor notebooks and technical papers
PublicationsThe author contributed to the following papers in professional publications during his service at Fairchild:
Rudin, M., O'Day, R. and Jenkins, R., System/circuit device considerations in the design and development of a D/A and A/D integrated circuits family. 1967 IEEE International Solid-State Circuits Conference: Digest of Technical Papers, vol. X (1967-02): 16-17.
Jenkins, R. T.; Fitzgerald, D. J., Reliability studies of LSI arrays employing Al-Si Schottky barrier devices. 1970 8th Annual Reliability Physics Symposium, (1970): 34.