Artifact Details


Whittier patent notebook (#423)

Catalog Number





This volume contains measurements of the VB (breakdown voltage) of wafer runs identified only by the prefix WD (pp. 1-30); proposal for use of MOS process for high-voltage breakdown transistor applications (pp. 31-35); structure for a double field plate SCR with notes on an invention based on this work loosely inserted (p. 36); surface field control of transistor cutoff characteristics (pp. 38-39).




Whittier, Ronald J.

Biographical Notes

Ronald (Ron) J. Whittier was born and raised in San Francisco. He received a B.Sc. in Chemical Engineering from the University of California, Berkeley in 1960. After working in the chemical industry, he received a Ph.D. in Chemical Engineering from Stanford University (1965). He joined the Fairchild's R&D division in 1965 and is listed in a 1966 R&D organization chart as Member of Technical Staff in the Surfaces-Device Theory section reporting to A. Grove. He joined Intel in 1970 and until 1977 he was responsible for memory product development. In 1977, he became general manager of the Memory Products Division. From 1984 through 1991, Whittier was the Director of Corporate Marketing. In 1991, he was responsible for a new software technology entity, which evolved to become the Intel Architecture Labs. From 1995 to 2000 he was responsible for Intel's various activities in content, applications and authoring tools, in the newly formed Content Group. From 2000 through 2010 he was Chairman of Convera Corporation, an indexing, search and retrieval software company.


Fairchild Semiconductor

Identifying Numbers

Document number 423


Approximately 17 dated entries over 43 pages.


12 x 10 inches



Collection Title

Fairchild Semiconductor notebooks and technical papers


The author contributed to the following R&D Technical Reports (TR) and papers in professional publications during his service at Fairchild:

TR298 Current gain and cutoff frequency falloff at high currents (1967-06-14).

TR414 Technology for the design of low power circuits (1969-06-23).

Dutton, R. W. and Whittier, R. J., Forward current—voltage and switching characteristics of p+-n-n+(epitaxial) diodes. IEEE Transactions on Electron Devices, vol. 16, iss. 5 (1969): 458-467.

Bittman, C., Wilson, G., Whittier, R., Waits, K. and Foglesong, R., Technology for the design of low power circuits. 1969 IEEE International Solid-State Circuits Conference: Digest of Technical Papers. vol. XII (1969): 152-153.

* Whittier, R. J. and Tremere, D. A., Current gain and cutoff frequency falloff at high currents. IEEE Transactions on Electron Devices, vol. 16, iss. 1 (1969): 39-57.

Hsu, S. T. and Whittier, R. J., Characteristics of burst (popcorn) noise in transistors and operational amplifiers. 1969 International Electron Devices Meeting, vol. 15 (1969): 86 – 88.

*Hsu, S.T. and Whittier, R.J. Characterization of burst noise in silicon devices. Solid-State Electronics, vol. 12 (1969) 867-878.

Whittier, R. J. and Downing, J. P., Simple physical model for the injection efficiency of diffused pn-junctions. 1968 International Electron Devices Meeting, vol. 14 (1968): 72.

* Whittier, R .J., The effects of lateral injection & base-widening on the high current- low voltage characteristics of transistors. Solid-State Electronics, vol. 13, iss. 1 (1970): 61-68.

* This paper is included in a three volume bound set of “Fairchild Research Published Technical Papers” assembled by Bruce Deal in 1988 (copy in the CHM Fairchild collection).


Gift of Texas Instruments Incorporated

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