Describes electrochemical etching of dielectric isolation moats (pp. 1-5); a biasing technique for NPN output stages using an emitter isolation diode (pp. 6-7); simultaneous fabrication of NPN and MOS transistors (pp. 8-11); A charge-redistribution A/ D converter (pp. 12-16).
Gray, Paul R.
Paul R. Gray was born in Jonesboro, Arkansas, and received B.S. (1963), M.S. (1965) and Ph.D. (1969) degrees from the University of Arizona. He joined the Fairchild Semiconductor R & D Laboratory in 1969, where he worked on process and circuit technology for bipolar and MOS devices. He became a faculty member at UC Berkeley’s EECS in 1971 where he and his researchers did seminal work on applying MOS techniques to analog circuits, such as filters, analog to digital converters, operational amplifiers, and other mixed signal integrated circuits. During industrial leaves of absence from his faculty posts, Gray served as Project Manager for Telecommunications Filters at Intel Corporation (1977-1978), and Director of CMOS Design Engineering at Microlinear Corporation (1984-85). Later positions at Berkeley include Chairman of the Department of Electrical Engineering and Computer Sciences (1990-93), Dean of the College of Engineering (1996-2000), and Executive Vice Chancellor and Provost (2000-2006). Gray is a member of the National Academy of Engineering and a Fellow of the IEEE.
5 dated entries over 14 pages.
12 x 10 inches
The author is named as inventor or co-inventor on 14 U.S. patents. None of these are assigned to Fairchild.
Fairchild Semiconductor notebooks and technical papers
The author has written and co-written more than 150 journal articles and conference presentations, and has been the co-recipient of a number of best paper awards. He has published four books, including a widely used college textbook on analog integrated circuits. All appear to have been written after he left Fairchild.