Moorby, Phil (Philip Raymond) oral history
Phil Moorby discusses his career and the invention, development, and history of Verilog. Phil Moorby developed the Verilog hardware description language and the original Verilog simulator at Gateway Design Automation in 1983. The language was revolutionary: it was a text-based language that supported structured, hierarchical hardware design. Verilog enabled simulation, synthesis, timing analysis and various other types of analysis, all based on a single source description of the design. Phil personally developed Verilog-XL, the first ASIC sign-off simulator. He co-authored the classic textbook on the Verilog language and its use. For some 25 years Phil worked alone or as the principal engineer on small teams at Gateway, Cadence, Co-Design, and Synopsys to define, develop, extend and improve Verilog. By 2007 Verilog had become the de facto industry-standard hardware description language. The Verilog language has profoundly influenced the design of computing hardware, and it has played a critical role in the continued success of Moore’s Law. In 2005, Moorby won EDAC’s Kaufman Award for the development of Verilog.
Item Details
- Date
- 2013-04-22 (Made)
- Type
- Document
- Catalogue number
- 102746653
- Organization
- Computer History Museum (Publisher)
- People
- Philip Moorby (Interviewee)
Gardner Hendrie (Videographer)
Steve Golson (Interviewer) - Category
- Transcript
- Credit line
- Gift of Computer History Museum
- Extent
- 78 p.
- Place of publication
- North America/USA/NH/South Hampton
- Language
- English
- Acquisition number
- X6806.2013
- Subject
- Simulation, Synthesis, GenRad, Gateway Design Automation, Synopsys, Verilog, Cadence, Electronic Design Automation (EDA)
- Archive collection
- CHM Oral History Collection
- Archive hierarchy
- CHM Oral History Collection