M. I.T. Asset Tag: MIT-0266832 Power req'd: 230 VAC, 3 ph. 100A / ph. Ref URL: http://www-erl.mit.edu/eaps/seminar/iap95/cnh/CM5Intro.html Hardware facts:(of which this artifact may comprise only a portion): M.I.T. CM5 System Specifications: Compiler server name scout.lcs.mit.edu Partition managers cm51.lcs.mit.edu cm52.lcs.mit.edu cm53.lcs.mit.edu I/O server name cm5io.lcs.mit.edu FEATURES CM-5 Processing Nodes Operating System CMost MICROPROCESSOR One SPARC per node Peak Performance 22 MIPS Clock Rate 32 MHz Function Control and scalar processing resource for vector units Cache 64-KByte, organized into 2,048 32-bit cache lines VECTOR UNITS Four per node Clock Rate 16 MHz Peak MFLOPS 128 per node Peak Integer MOPS 128 per node Memory Access Path 64-bit Vector Length Can vary from 1 to 16 elements Registers Per Unit 64 64- bit; also addressable as 128 32-bit DISK STORAGE NODES Several RAID Subsystems Capacity 24 GBytes (at present) Bandwidth 12 MBytes/sec per node Latency to Access 75 milliseconds PROCESSOR NODE MEMORY 32-MByte dynamic RAM using 4-MBit technology, with support for upgrading to 16-MBit technology. Memory Per Node Four banks of 8 MBytes each Memory Bus Per Bank 64-bit (plus 8 ECC bits) Aggregate Path to Mem 256 bits per node Peak Bandwidth/Node 512 MBytes/sec Boot ROM 2-KByte CONTROL PROCESSORS PARTITION CP`s Four SPARC 2 computers running CMOST. Function: Manages partitions of processor nodes Memory 64 MBytes Disk 840-MByte IOCP One SPARC 2 computers running CMOST. Function: Performs I/O control for the f/s Memory 64 MBytes Disk 840-MByte I discovered a file relating to the physical transfer of the CM-5 and the CM-2 to the museum.
Date
1993
Manufacturer
Thinking Machines Corporation
Place Manufactured
U.S.
Identifying Numbers
Model number
CM-5
Black label on bottom right frame behind angle door
Part number
300-7920
Label on bottom left frame behind panel
Serial number
PMI000069
Label on bottom left frame behind panel
Serial number
Y492
Black label on bottom right frame behind angle door