Artifact Details

Description

This ACS Emitter Coupled Logic (ECL) board is a large multi-layer circuit board densely populated with ICs on both sides. It has a heavy metal extractor rail with two pivoted handles. There are multi-layer printed wire board assemblies plugged into a mother board assembly. It has transistors on both sides- 22 x 7. It was used in central memory- peripheral processor and central processor. BPMEM1 919202 PWB-(A)- 96214-607803-2(G)

The Advanced Scientific Computer, or ASC, was a supercomputer architecture designed by Texas Instruments (TI) between 1966 and 1973. Key to the ASC's design was a single, high-speed shared memory. The memory system had 8 banks and 8 ports, each connected to an ASC subsystem. Access was through an eight way full crossbar switch. The switch allowed all 8 ports to simultaneous access memory. Each access produces an "octet" or eight 32 bit words.

The ASC consisted of two primary subsystems: the Peripheral Processor (PP) and the Central Processor (CP). The PP executed the operating system. The CP executed the user application programs.

The PP had 8 virtual processors. It had one set of execution hardware and 8 sets of registers. The registers were connected to the execution hardware in a rotating fashion similar to Seymour Cray's ground breaking CDC 6600.

The CP was a vector, pipelined processor. There were 48 thirty-two bit registers: 16 arithmetic, 16 base address and 16 vector registers. The CP had three kinds of subsystems: an Instruction Processor unit (IP), Memory Buffer (MB) units and Vector units. A MB and a Vector unit were paired to create a vector pipeline. The IP fetched an octet, broke it into single instructions and dispatched them. The MB performed the memory accesses for each instruction. Each vector pipeline unit had an Arithmetic unit and a vector processor. A scalar instruction simply went through the Arithmetic unit as in a traditional computer. A vector instruction went through the Arithmetic unit multiple times with addresses and operands modified by the vector processor.

The ASC could be configured with 1, 2 or 4 vector pipelines. Most were 2 pipe machines. The first prototype had one pipe. Only one 4 pipe system was built. Each vector pipeline had its own memory buffer unit. Each memory buffer unit had its own port to the shared memory. Since the Arithmetic unit was pipelined, it could produce a result every clock cycle. This arrangement could perform a massive amount of calculation. For example, the ASC Fortran compiler could break a "Do-Loop" into 4 vector instructions. In a 4 pipe machine, each vector instruction was sent to its own pipe and they would execute in parallel. The net result was 4 calculations from the "Do-Loop" every clock cycle.

The TI Advanced Scientific Computer was a supercomputer that combined a Peripheral Processor and a Central Processor along with software that could automatically produce vectorized code from unmodified source code.

Date

1971

Manufacturer

Texas Instruments Incorporated (TI)

Place Manufactured

U.S.

Identifying Numbers

Model number	ASC	Not visible on object 11/29/07
Other number	011483 0976	Stamped on front
Other number	7225	Stamped on front
Other number	96214-607803 2(G)	Stamped and printed on both extractor handles
Other number	96214-630938 2(F)	Stamped on metal extractor rail
Other number	BPMEM1 919202 PWB-(A)	Printed on top front

Dimensions

overall: 1/2 in x 9 1/2 in x 8 1/2 in; 250x360mm

Category

Component: circuit board / module

Credit

Gift of Texas Instruments, Inc.

Lot Number

XD238.80