1966: Computer Aided Design Tools Developed for ICs

IBM engineers pioneer computer-aided electronic design automation tools for reducing errors and speeding design time.

 

 

 

As ICs began to incorporate hundreds of gates and thousands of transistors, the computers they enabled were harnessed to speed the design task and eliminate errors. This process is called CAD (Computer Aided Design) or EDA (Electronic Design Automation). IBM pioneered EDA in the late 1950s with documentation of the 700 series computers. By 1966 James Koford and his colleagues at IBM Fishkill were capturing SLT hybrid circuit module (1964 Milestone) designs on graphical displays, checking them for errors and automatically converting the information into mask patterns. After Koford joined Fairchild R&D he worked with Hugh Mays, Ed Jones, and others to apply this process to monolithic ICs. Their efforts created logic simulators (FAIRSIM), test program generators, and place and route software for gate arrays and standard cells (1967 Milestone) that laid the ground work for generations of EDA tools.

Two important EDA projects originated outside the mainstream of the industry. Larry Nagel and Donald Pederson, with later contributions by Richard Newton, at U.C. Berkeley developed the SPICE (Simulation Program with IC Emphasis) circuit simulation program in the 1960s. A new methodology described in the 1979 Introduction to VLSI Systems by Lynn Conway of Xerox, PARC and Carver Mead of California Institute of Technology demystified the process of chip design for system designers.

Commercial logic synthesis packages from Cadence and Synopsys in the 1980s were stimulated by research at U.C. Berkeley (SIS), U.C.L.A. (RASP), and University of Colorado, Boulder (BOLD). These, together with advancements in place and route, logic simulation, and design rule verification from other vendors, allowed IC design productivity to keep pace with increasing device complexity.