1960: First Planar Integrated Circuit is Fabricated
Jay Last leads development of the first commercial IC based on Hoerni's planar process and Noyce's monolithic approach.
In August 1959 Fairchild Semiconductor Director of R&D, Robert Noyce asked co-founder Jay Last to begin development of an integrated circuit based on Hoerni's planar process (1959 Milestone) and Noyce's patent. (1959 Milestone) After building a multi-chip flip-flop with discrete transistors to demonstrate the concept at Wescon, Last assembled a team including Sam Fok, Isy Haas, Lionel Kattner, and James Nall. Based on characterization data prepared by Don Farina, Robert Norman of the applications department designed a flip-flop with four-transistors and five resistors using a modified Direct Coupled Transistor Logic (DCTL) circuit as most compatible with early planar processing capabilities.
Integrating multiple interconnected devices on one chip posed many new engineering challenges. The first working monolithic devices produced on May 26 1960 used physical isolation to achieve electrical separation between components. Deep channels were etched from the rear of the silicon wafer and filled with non-conducting epoxy. The preferred production method, p-n junction electrical isolation using a boron diffusion technique developed by Haas and Kattner, yielded working circuits on September 27, 1960.
Fairchild presented advanced information at engineering conferences and provided prototype samples to customers in 1960. Under the trade name µLogic (Micrologic), the type "F" flip-flop function was announced to the public in March 1961 via a press conference at the IRE Show in New York and a photograph in LIFE magazine. Five additional circuits, including the type "G" gate function (1962 Milestone), a half adder, and a half shift register, were introduced in October.
Texas Instruments quickly adopted the planar technique and in October 1961 announced the Series 51 DCTL "fully-integrated circuit" family, its first ICs to use deposited-metal interconnections.
- Norman, R. Last, J. Haas, I. "Solid-state Micrologic Elements," Solid-State Circuits Conference. Digest of Technical Papers. 1960 IEEE International Volume: III, (Feb 1960) pp. 82- 83
- Farina, Donald; Nall, James; Anderson, Richard. "Application of Micrologic Elements" Paper presented at the National Electronics Conference October 10-12, 1960. Reprinted as Fairchild Semiconductor Technical Paper TP-11/3. March 1963.
- Moore, G. E. "The Role of Fairchild in Silicon Technology" Proceedings of the IEEE Vol. 86, Issue 1 (1998) pp. 53-62.
- Lécuyer, Christophe Making Silicon Valley: Innovation and the Growth of High Tech 1930-1970. (Cambridge: The MIT Press, 2006) p. 158.
- Augarten, Stan "Putting the Planar Process to Good Use," State Of The Art: A Photographic History of the Integrated Circuit. (New Haven & New York: Ticknor and Fields, 1983) pp. 10, also "Resistor - Transistor Logic," p. 14.
- Berlin, L. The Man behind the Microchip. (Oxford University Press, Inc., 2005) pp. 135
- Lécuyer,Christophe and Brock, David C. Makers of the Microchip: A Documentary History of Fairchild Semiconductor The MIT Press (September 30, 2010)