Title
Software Controlled Caches in the VMP Multiprocessor, lecture by David Cheriton
Catalog Number
102645841
Type
Moving Image
Description
Label taped to the video case reads: "VMP is an experimental multiprocessor that follows the familiar basic design of multiple processors, virtually addresed, single master connection to its cache, providing very high memory bandwith. An unusually large cache page size and fast sequential memory copy hardware make it feasible for cache misses to be handled in software, analogusly to the handling of virtual memory page faults. Hardware support for cache consistency is limited to a simple state machine that monitors the bus and interrupts the processor when a cache consistency action is required. In this talk, we describe how the VMP design provides the high memory bandwith required by modern high-performance processors with a minimum of hardware complexity and cost. We also describe simple solutions to the consistency problems associated with virtually addressed caches. Simulation results indicate that the design achieves good performance providing data contention not excessive."
Date
1986-10-08
Credits
Cheriton, David
Publisher
Stanford University. Stanford Computer Forum
Place of Publication
Palo Alto, CA, US
Identifying Numbers
| Other number |
COMPAQ 0248890 |
| Other number |
DLS 89 |
| Other number |
Tape 89 |
| Other number |
VIDEO SCF 11 |
Platform
NTSC VHS VCR
Format
VHS
Category
Lecture
Series Title
Stanford Computer Forum Distinguished Lecture Series
