CreditsShippy, David J.
PublisherUniversity Video Communications
FormatBetacam SP (short)
Copyright HolderComputer History Museum
DescriptionFrom University Video Communications' catalog:
"The POWER2+ Processor is the next generation high-performance POWER2 superscalar RISC processor. This new design targets increased commercial transaction processing which is achieved by the addition of a tightly coupled L2 cache interface, high bandwidth busses, and large L1 instruction and data caches, and provides a cost reduced system which is achieved through new Solder Ball Connect packaging and the capability to reduce the number of L1 data cache chips from 4 to 2 with a 2 word interface to main memory."