TitleAllison patent notebook (#153)
AuthorAllison, David F.
Biographical NotesDavid (Dave) F. Allison was an employee of Shockley Semiconductor prior to joining Fairchild in 1957 when he was issued company patent notebook # 10. He worked initially on the first NPN transistor project as a process engineer responsible for the development of diffusion techniques. He was a member of the Device Development Group at R&D when he resigned to join the founding group at Signetics in August 1961. In 1971 he was with Signetics Memory Systems. In an oral history, Lionel Kattner credited Allison with contributing to his understanding of process technology that played an important role in the development of diffusion techniques used in the electrical isolation of Micrologic devices in the period of 1960 covered by this book. CHM has a photo of Allison in the collection. See Accession Number: 102708135.
ExtentApproximately 13 dated entries over 4 pages.
Dimensions12 x 10 inches
DescriptionThis is the second patent notebook issued to Allison. It has just three entries. Each describes an idea for a new product: a “Method for making an analog transistor”; a high yielding power transistor; and a zener diode structure.
Collection TitleFairchild Semiconductor notebooks and technical papers
PublicationsThe author contributed to the following papers in professional publications during his service at Fairchild:
Allison, D. F., Baker, O. and Moore, G. E., KMC silicon planar transistors. 1961 International Electron Devices Meeting, vol. 7 (1961): 18.
Allison, D., Beeson, R. and Shultz, R., KMC planar transistors in microwatt logic circuitry . 1961 IEEE International Solid-State Circuits Conference: Digest of Technical Papers, vol. IV (1961): 62 – 63.
Maxwell, D. A., Beeson, R. H. and Allison, D. F., The minimization of parasitics in integrated circuits by dielectric isolation. IEEE Transactions on Electron Devices, vol. 12, iss. 1 (1965): 20-25.