As ICs increased in complexity their design and manufacturing turn-around times stretched out to years even as some end product life cycles shrank to a single season. To speed the availability of prototype quantities of complex custom circuits for the Air Force in 1967 IBM and Texas Instruments developed “discretionary-wiring” approaches that employed a unique computer-generated (1966 Milestone) metal mask for every wafer.
Two approaches developed for volume production of custom designs are gate arrays and standard cells - collectively known as Application-Specific ICs (ASIC). Gate arrays are produced as wafers of unconnected transistors. As the customizing interconnections are applied at the final manufacturing step, although less efficient in silicon usage than handcrafted chips, prototypes can be produced in days rather than months. Early gate array suppliers such as Ferranti/Interdesign designed the custom connections manually. In 1967 Fairchild introduced the Micromatrix family of bipolar DTL and TTL arrays that used CAD tools to perform this operation interactively. Robert Lipp designed the first CMOS array for International Microcircuits in 1974 but viable CAD support was not forthcoming for several years. Standard cell ICs employ a full set of fabrication masks using designs assembled from catalog functions stored in a computer library. They offer a compromise between silicon-efficient handcrafted designs and the fast turn-around of gate arrays. Fairchild and Motorola offered early MOS standard cell capabilities under the trade names Micromosaic and Polycell. VLSI Technology (founded 1979) and LSI Logic (1981) successfully exploited these CAD-based ASIC concepts abandoned by the original vendors in early 1970s largely due to the then high cost of computing time.
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