1978 - PAL User-Programmable Logic Devices Introduced
John Birkner and H. T. Chua of Monolithic Memories develop easy-to-use programmable array logic (PAL) devices and tools for fast prototyping custom logic functions.
H. T. Chua and John Birkner in the mid-1980s
Credit: Monolithic Memories, Inc.
Creative logic designers realized that small, fast PROMs (1971 Milestone) could also be configured to perform simple logic functions. Based on a request from Honeywell, in 1975 Ron Cline adapted Signetics PROM circuit technology to design the 82S100 Programmable Logic Array (PLA) to serve more complex logic needs. A desired function, expressed as set of Boolean logic equations, was entered into a fuse programming unit that instantly generated a custom IC on the designer's desktop.
John Birkner and H.T. Chua of Monolithic Memories worked with Andy Chan to introduce a more streamlined architecture they called Programmable Array Logic (PAL) in 1978 that traded logic flexibility for faster speed and lower cost. The PALASM (PAL Assembler) software design tool also made the devices easy to use. License agreements with AMD, National, and TI established the 20-pin bipolar devices (16L8, 16R8, etc) as industry standard products. They are featured in Tracey Kidder’s The Soul of a New Machine (1981), a technology bestseller of the era. A more versatile architecture from AMD (22V10), CMOS technology for lower power from Cypress and Lattice, and reusable CMOS EPROM-based devices supported by PC-compatible schematic-entry design tools from Altera (1983) expanded their range of applications.
Xilinx (1984), Actel (1985), and QuickLogic (1988) introduced Field Programmable Gate Array (FPGA) architectures to serve higher gate-count applications. System designers selected one of these user-configurable solutions, collectively known as PLDs (Programmable Logic Devices), over ASIC approaches (1967 Milestone) as the preferred approach to custom digital logic for all but the lowest cost or highest performance applications.
Birkner, John M., Chua, Hua-Thye, “Programmable array logic circuit,” U. S. Patent 4124899 (Filed May 23, 1977. Issued November 7, 1978).
Cline, R. “A Single-Chip Sequential Logic Element,” IEEE International Solid Sate Circuits Conference, Digest of Technical Papers, 15-17 (Feb, 1978) pp. 204-205.
Birkner, John M., PAL Programmable Array Logic Handbook. (Santa Clara: Monolithic Memories, 1978)
Cavlan, Napoleone. “Field Programmable logic array circuit,” U. S. Patent 4,422,072 (Filed July 30, 1981. Issued Dec. 20, 1983).
Hnatek, E. A User’s Handbook of Semiconductor Memories. (John Wylie and Sons, 1977) Chapter 4 “The Read-Only Memory (ROM) and the Programmable Logic Array (PLA).”
Kidder, Tracey. The Soul of a New Machine. (Little Brown & Co., 1981).
Augarten, Stan. “A Programmable Logic Chip,” State Of The Art: A Photographic History of the Integrated Circuit. (New Haven & New York: Ticknor and Fields, 1983) p.54.
Pellerin, David and Holley, Michael. Practical Design Using Programmable Logic (Prentice Hall, 1991)