Random Access Read-Write Memories (RAMs) store information that changes frequently and must be accessed quickly. Offering the lowest cost per storage bit, magnetic ferrite core arrays comprised the dominant RAM technology through the mid-1970s. Operations requiring faster access stored data temporarily in semiconductor flip-flop circuits called registers. IBM Components Division engineers Ben Agusta and Paul Castrucci developed the SP95 16-bit bipolar RAM for the System/360 Model 95 in late 1965. In 1966, a team led by Tom Longo at Transitron built the TMC3162 16-bit TTL scratchpad memory for the Honeywell Model 4200 minicomputer. Fairchild (9033), Sylvania (SM-80), and TI (SN7481) alternated-sourced the design. IBM produced a 64-bit chip for a cache memory in 1966. Fairchild (9035 and 93403), Intel (3101), TI (SN7489) followed with high-speed 64-bit devices as standard products.
In 1969 the IBM East Fishkill, NY facility produced a 128-bit device for the 1971 shipment of System/360 Model 145, the company's first commercial computer to employ semiconductor main memory. Using the 4100 (aka 93400) 256-bit TTL chip designed by H.T. Chua, Fairchild delivered semiconductor main memory systems for the Burroughs Illiac IV computer in April 1970. Using Douglas Peltzer’s Isoplanar oxide-isolated process that improved speed while consuming less silicon area, Fairchild's Bill Herndon designed a fast 256-bit TTL memory (93410) in 1971. The Cray 1 supercomputer introduced in 1976 used 65,000 Fairchild 1024-bit ECL RAM chips (10415) based on the Isoplanar process. Bipolar technology enabled faster computers but it took the MOS process to deliver low-cost solutions for widespread use in main memory and general-purpose applications. (1970 Milestone)
Perkins, H. A. and Schmidt, J. D. "An integrated semiconductor memory system," Fall Joint Computer Conference. AFIPS Proc., Vol. 27, (Nov. 1965) pp. 1053-1064.
Agusta, B., Bardell, P., Castrucci, P. "Sixteen bit monolithic memory array chip," IEEE Electron Devices Meeting, 1965 International Vol. 11 (1965) p. 39.
Agusta, B., Bardell, P., Castrucci, P., Henle, R., Pecoraro, R. "Monolithic Integrated Array Structure Including Fabrication and Package Therefor" U. S. Patent 3,508,209 (Filed March 31, 1966, issued April 21, 1970)
Rice, R., Sander, W. B., and Greene, F. S. Jr. "Design considerations leading to the ILLIAC IV LSI processor element memories," IEEE Journal Solid-State Circuits, Vol. SC-5, (Oct. 1970) pp. 174-181.
"Isolation Method Shrinks Bipolar cells for Fast, Dense Memories," Electronics (March 1, 1971) p. 76.
Castrucci, Paul (IBM, Sematech), an oral history (2008-7-18)
Pugh, E. W., Critchlow, D. L., Henle, R. A., Russell L. A. "Solid State Memory Development in IBM," IBM Journal of Research and Development.Vol. 25, No. 5 (September 1981) pp. 585-602.
Augarten, Stan. "The First 256-Bit Static RAM," State Of The Art: A Photographic History of the Integrated Circuit.(New Haven & New York: Ticknor and Fields, 1983) p.24.
Pugh, Emerson W., Johnson, Lyle R., Palmer John H. IBM's 360 and Early 370 Systems (Cambridge, MA: The MIT Press, 1991) pp. 424-488
Bassett, Ross Knox. To the Digital Age. (Baltimore: The Johns Hopkins University Press, 2002) p. 102.